At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are seeking a
Principal ATE Test Engineer to lead development and deployment of production test solutions for our
large complex SoCs deployed in our Emulation Products. This role owns ATE test strategy and execution from first silicon bringup through qualification and highvolume manufacturing, working closely with design, DFT, and global manufacturing partners.
This is a handson technical leadership role for engineers passionate about silicon quality, yield, and scalable test solutions.
Job Responsibilities
- Lead ATE test development for wafer sort (CP) and final test (FT)
- Drive firstsilicon bringup, debug, and characterization
- Define test coverage, binning, guardbanding, and production release criteria
- Analyze yield and failure data; drive testrelated yield and quality improvements
- Partner with DFT, design, OSATs, and test houses to ensure manufacturable solutions
- Support qualification, production ramp, and sustained manufacturing
- Mentor engineers and act as a technical test leader across product teams
Job Qualifications
- 10+ years of experience in ATE test engineering
- Strong handson experience with CP/FT test program development
- Experience with Advantest 93K ATE platform
- Solid understanding of DFT and silicon debug
- Proven experience supporting production and working with offshore test partners
- Strong problemsolving and crossfunctional communication skills
We're doing work that matters. Help us solve what others can't. 
