Responsibilities
1. Responsible for the front-end/back-end verification of the company's chip projects, mainly focusing on SoC and system verification, scenario analysis, verification strategy formulation, and software and hardware collaborative verification 2. Responsible for the collaborative work of software, tool chains, design and verification.
Qualifications
1. Bachelor degree or above in microelectronics, computer and other related majors, 5 years or more of verification experience, and tape-out experience 2. Familiar with the chip development/verification process, proficient in verification-related EDA tools, and proficient in mainstream verification methodologies such as UVM 3. Proficient in the SystemVerilog hardware design language, familiar with one or more of the C/C++/SystemC modeling languages, and familiar with the Python/Perl scripting language 4. Able to independently build a verification platform to complete IP Subsys/SoC level verification, test point decomposition, and code/function coverage analysis 5. Proficient in the verification of storage subsystems commonly used in SoC, and proficient in at least one type of storage system such as LPDDR, DRAM, HBM, Flash, SRAM, storage and computing integration, etc. Applicants with one/more of the following verification experience will be given priority: 1. Proficient in SoC system performance verification 2. AI/NPU verification experience: familiar with AI subsystems, large models, and commonly used AI subsystem verification methods 3. Experience in verification management.
