Senior Staff Engineer - EUROPE - Physical Design / CPU / RTL to GDS

We are looking for a Senior Staff Engineer to join a world leading semiconductor powerhouse at their site in Cork.

The position involves end-to-end ASIC development, from architecture to implementation, in collaboration with other teams.

As a Senior Staff Engineer your responsibilities will include:

• Design Leadership: Lead the design and development of digital and/or analog IP to meet key performance, quality, and power targets.
• Technical Management: Oversee the complete ASIC development pipeline, including high-level design, synthesis, layout, timing, and verification.
• System Integration: Define architectures and circuit specifications based on system-level requirements.
• Tool Expertise: Utilize standard industry tools for advanced block/SoC or IC package design.
• Collaboration & Mentorship: Work closely with hardware, software, and product teams. Additionally, create and review technical documentation while mentoring junior engineers

As a Senior Staff Engineer your skills will include:

• Bachelor's degree in Engineering, Computer Science, or a related field is required
• 6+ years ASIC experience
• Alternatively, a Master's degree with 5+ years or a PhD with 4+ years of experience in ASIC design, verification, validation, or integration
• Experience with architecture/design tools, scripting languages, and verification methods
• 2+ years experience engaging with senior leadership

Feel free to also refer someone you may know who could be good for the role. If they are successfully placed, we offer a great referral scheme!

Key words RTL to GDS / STA / RTL Design / Design Implementation / Timing Closure / Synthesis / Physical Design / Layout / GDS2 / EDA / Perl / Tcl / Shell / Digital Design / CPU / ASIC

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