Job summary:
We are seeking a results-oriented Technical Program Manager (TPM) to drive development, qualification, and ramp-to-volume of next-generation high-frequency board-to-board, mezzanine, backplane, and cable-assembly connectors supporting data rates of 64 GT/s and beyond (PCIe Gen6, 224 G PAM4, etc.). The ideal candidate blends strong program-management discipline with a solid engineering foundation in Electrical Engineering (EE), Mechanical Engineering (ME), or Signal Integrity (SI), enabling deep engagement with design, SI modeling, manufacturing, and customer integration teams. This position may require up to 35% international travel each year as needed.
Core Responsibilities:
- Program Ownership – Define scope, schedule, budget, and success metrics for new connector/cables programs; maintain the integrated program plan from concept through mass production.
- Cross-Functional Leadership – Coordinate EE, ME, SI, QA, NPI, supply-chain, and manufacturing resources; resolve competing priorities and remove roadblocks.
- Technical Decision-Making – Evaluate trade-offs among impedance control, insertion/return loss, crosstalk, plating choices, mechanical robustness, and cost; arbitrate design-for-manufacturability (DFM) and design-for-test (DFT) issues.
- Risk Management – Build and actively maintain FMEA and mitigation plans for SI margin, tool wear, plating voids, thermal cycling, and regulatory compliance
- Customer & Supplier Interface – Serve as primary technical point-of-contact for hyperscalers, OEMs, and tier-1 EMS partners; align connector roadmaps with PCI-SIG, OCP, and IEEE standards evolutions.
- Phase-Gate & Agile Execution – Drive PRDs, design reviews, EVT/DVT/PVT, and launch readiness using a hybrid waterfall/Agile approach; track KPIs in JIRA, Confluence, Smartsheet, or equivalent.
- Data-Driven Reporting – Consolidate SI simulations (HFSS, CST, Sigrity, ADS), mechanical stack-up analysis, and reliability test results into executive dashboards; communicate status to VP-level stakeholders.
- Cost & Yield Optimization – Partner with operations on tooling strategy, process capability (Cp/Cpk), and supplier scorecards to secure target COGS and >95 % first-pass yield at ramp
Preferred Qualifications
- Prior ownership of MCIO, NearStack, SAS, Z-link, or CEM connector/cable portfolios.
- Experience qualifying suppliers in APAC (Taiwan, China, Malaysia) and managing CM build schedules.
- Familiarity with industry standards (PCI-SIG, OIF-CEI, IEEE 802.3, JEDEC, SNIA).
- Experience with statistical tools (JMP, Minitab) for DOE and process-capability analysis.
