Substrate / Advanced Packaging Manager

Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world's largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade.

As chip sizes increase and packaging technologies become more complex, substrate engineering is emerging as a critical domain. This role supports TSMC's leadership in 3DIC and advanced packaging by extending expertise beyond chip-level design into packaging-level integration. The team is addressing challenges such as warpage, power delivery, thermal management, and material innovation. Future evolution includes Chip-on-Wafer-on-PCB (CoWoP) under TSMC's System Technology Optimization program.

The position requires strong design and technology expertise to define future customer requirements, focusing on integrated packaging, dielectric parameters, high-speed I/O, and trade-offs that directly impact system performance. This role is critical in shaping the direction of 3DIC development.

We are seeking a highly skilled and motivated Substrate / Advanced Package Manager to join our cutting-edge 3DIC design team. The ideal candidate will have a strong foundation in semiconductor physics, mechanical engineering principles, and EDA (Electronic Design Automation) tools, with a passion for innovation in advanced packaging design. The role involves design, simulation, and modeling of complex substrate and packaging technologies to support next generation 3DIC applications.

Job Responsibilities:

1. Design, simulate, and optimize advanced packaging for 3DIC applications.

2. Collaborate with cross-functional teams to define specifications and requirements.

3. Perform modeling of warpage, stress, reliability, and thermal performance using industry-standard EDA tools.

4. Formulate and solve problems in research-driven, often ambiguous domains.

5. Provide guidance on high-speed I/O modeling and integration.

6. Develop and maintain documentation, including specifications, test plans, and design reviews.

7. Stay current with industry trends, tools, and technologies in advanced packaging.

Job Qualifications:

Minimum Qualifications

1. Master's or Ph.D. degree in Electrical Engineering, Mechanical Engineering, or a related field.

2. 15+ years of hands-on expertise in advanced packaging technologies and substrate design.

3. Understanding of semiconductor device physics and packaging process technologies.

4. Strong knowledge of warpage, stress, and thermal effects in packaging.

5. Proven ability to drive solutions in ambiguous, research-oriented contexts.

6. Excellent problem-solving, analytical, and communication skills.

7. Strong collaboration skills, with the ability to mentor junior engineers.

8. Ability to balance strategic insight with hands-on technical execution.

Preferred Qualifications

1. Experience with reliability, IR/EM, and multi-physics analysis.

2. Familiarity with machine learning techniques for design optimization.

3. Patents, publications, or demonstrated innovation in substrate or packaging domains.

Success Metrics

1. Ability to provide impactful, data-driven suggestions that influence design direction.

2. Effective use of modeling and simulation to validate proposals.

3. Establishing trust and credibility with global teams.

4. Enabling adoption of new technologies within the 3DIC ecosystem.

Fostering a global inclusive workplace reflects TSMC's core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.