Job Description
We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot.
Yield is the ultimate scorecard of a fab. As a Yield & Metrology Engineer at Terafab, you will build the data infrastructure, defect learning systems, and metrology strategy that drives Terafab chip manufacturing to world-class yield levels. You will connect electrical test data, inline defect inspection, physical failure analysis, and process signals to identify and eliminate the systematic yield limiters that determine Terafab's viability.
RESPONSIBILITIES:
Build Terafab's yield learning infrastructure from the ground up: defect inspection sampling plans, inline metrology flows, and electrical test correlation frameworks Lead systematic yield analysis using defect pareto, binning analysis, parametric correlation, and spatial signature decomposition Own the inline metrology strategy across all critical layers: CD, overlay, film thickness, defect density, and electrical continuity Drive defect reduction programs across all yield-limiting defect types such as particles, pattern defects, etch residues, shorts, and opens Partner with process, equipment, and integration engineers to close the loop between yield data and corrective actions Develop automated data pipelines, yield dashboards, and early warning systems using Python, SQL, and internal data tooling Lead physical failure analysis (PFA) including FIB/SEM cross-sections, EBAC, and TEM sample preparation Build die-level yield models and simulation capabilities to project yield at scale and prioritize defect investment
REQUIREMENTS:
BS in electrical engineering, physics, materials science, or equivalent experience 5+ years of yield engineering or metrology engineering experience in a leading-edge semiconductor fab Strong proficiency in yield analysis: defect pareto, spatial analysis, electrical bin correlation, and parametric yield modeling Experience with defect inspection and review tools (KLA, Camtek) and defect classification systems Experience building yield learning systems from scratch in a greenfield fab environment Experience in ML/AI-based defect classification or yield prediction modeling Solid programming skills in Python or R for data analysis, visualization, and process control automation Familiarity with wafer sort, electrical test structures, and EDS analysis for yield learning Familiarity with FIB/SEM sample preparation and advanced PFA techniques
