Job Description
We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot.
Process engineering is where Terafab technology gets built, atom by atom, and dry etch is where plasma meets precision. You will develop and own etch processes across three distinct chip families: edge-inference processors, space-hardened chips for orbital satellites, and high-bandwidth memory. You'll optimize selectivity, profile control, and critical dimension uniformity across complex material stacks; from high-k dielectrics to metal gates to through-silicon vias.
You should have deep expertise in plasma etch, but be ready to work across core process domains such as lithography, metrology, and film deposition as integration evolves. This is a highly hands-on role at one of the most ambitious fab programs in the world.
Responsibilities:
Develop and qualify plasma etch processes for critical layers—gate, spacer, contact, and metal interconnect—at 2nm-class dimensions Develop atomic layer etch (ALE) processes for steps requiring angstrom-level profile and selectivity control Optimize etch profiles, CD control, uniformity, and selectivity using a first-principles, physics-based approach to plasma chemistry and etch mechanism understanding Qualify etch tools from installation through production readiness, including chamber seasoning, plasma characterization, and process window qualification Analyze processes from a first-principles, physics-based approach to understand and manipulate mechanisms, not just recipes Lead root cause analysis, establish inline metrology and SPC control strategies, and drive systematic yield improvement Support 24/7 manufacturing operations through rotations, on-call availability, and rapid response to critical production issues Drive next-generation plasma etch chemistry and process development
Requirements:
BS or MS in Chemical Engineering, Materials Science, Electrical Engineering, Physics, or related technical field 5+ years of hands-on dry etch process engineering experience in a semiconductor fab, especially <7nm in a logic, memory, or foundry environment Deep experience with etch tool qualification (Lam, Applied Materials, or Tokyo Electron), plasma etch process development, and process of record (POR) establishment at advanced nodes Proficiency with etch metrology tools: CD-SEM, TEM, XPS, defect inspection, and etch profile characterization Strong DOE skills and statistical analysis capability (JMP, Python, or R) Ability to work closely and proactively across lithography, etch, thin films, integration, and equipment engineering teams
