Responsibilities
1. Carry out IP module front-end design according to the overall chip design requirements, SOC Integration 2. According to the module specification requirements, determine the software and hardware division with the software, and complete the RTL design of the digital circuit module (including DFT), including circuit synthesis, timing check (Timing check), functional verification, Formal Verification, simulation, etc. 3. Analyze module-level power consumption, area, and performance 4. Provide necessary support for back-end design, and conduct post layout simulation (Post Layout Simulation) after the back-end design is completed 5. Participate in chip testing and debugging.
Qualifications
1. 5 years of bachelor's degree in electronics, microelectronics, computer and other related majors, 3 years of experience in SOC front-end design as a master's degree or above 2. Relevant experience in digital integrated circuit front-end RTL design familiar with programming tools such as Verilog/SystemVerilog 3. Familiar with ARMV8 system architecture experience in developing 64-bit ARMSOC 4. Familiar with digital IC design process, proficient in EDA tools such as Synopsys/Cadence/Mentor 5. Understand DV/SV/UVM verification methodology proficient in using Linux/Unix operating system, familiar with Scripts languages such as Tcl/Perl/Python 6. Work seriously and responsibly, have good communication and learning skills, strong English reading and writing skills, and good teamwork spirit.
