Responsibilities
1. Connect with the demander, dismantle the systemic requirements and convert them into achievable technical specifications at the SoC architecture level 2. Participate in the top-level design of the SoC architecture and be responsible for writing SoC Top specification documents 3. Participate in the IP selection, specification definition and architecture design of each subsystem of the SoC to ensure efficient collaboration between subsystems 4. Responsible for the unified address space and access relationship planning of the SoC to meet the data interaction needs of each subsystem 5. SoC architecture design and integration optimization: 1) Responsible for the RAS architecture design of the SoC to meet system-level reliability index requirements 2) Organize discussions on other architecture issues across subsystems within the SoC, and be responsible for the design of related SoC top-level solutions 3) Participate in the design of SoC top-level integration, performance tuning, power consumption analysis, etc. 4) Participate in software and hardware collaborative architecture discussions, and be responsible for the design of related SoC hardware solutions.
Qualifications
1. Bachelor degree or above in microelectronics, computer and other related majors, 5 years or more of SoC architecture/design experience 2. Familiar with SoC architecture (such as the industry's mainstream AI chip architecture, etc.), CPU architecture (such as x86, ARM, RISC-V, etc.), NoC architecture design, and high-speed interface protocols such as DDR/PCIe/Ethernet/D2D. Applicants with experience in high-performance or advanced process SoC architecture, CPU architecture/design, cloud chip NoC architecture/design, or high-speed interconnection architecture/design are preferred 3. Understand clock reset design and the back-end and packaging and testing processes of chip design. Applicants with experience in SoC top-level integration or related projects are preferred 4. Applicants with a certain understanding of mainstream AI algorithms and system software, and experience in mapping AI algorithms to SoC data flow or software and hardware co-design are preferred 5. Have strong system analysis and problem-solving capabilities.