Job Description:
1.Joining in specification definition, designing verification
platform, developing behavioral models, and responsible for
system and functional verification
Qualification
1.BS or above, majoring in EE, CS or related fields
2.at least 2 years experience in IP/SoC Verification
3.Familiar with hardware description language (Verilog) and
verification language(Vera/Specman/PSL/Open Vera)
4.Experience in IC design is a plus
5.Knowledge in multimedia systems is a plus
