Senior Physical Design Lead | 8+ yrs

About the Role

leadIC Design Pvt Ltd is seeking an experienced and highly skilled Senior Physical Design Lead to drive the implementation and delivery of complex SoC and ASIC designs targeting advanced technology nodes. The ideal candidate will have deep expertise in Cadence Innovus implementation flow and hands-on experience with advanced TSMC process technologies.

This role offers the opportunity to lead challenging projects, mentor engineering teams, and contribute to cutting-edge semiconductor products from RTL-to-GDSII.

Key Responsibilities

• Lead end-to-end Physical Design implementation for complex SoC/ASIC projects.
• Drive floorplanning, power planning, placement, clock tree synthesis (CTS), routing, timing closure, and physical verification.
• Own design closure across PPA (Performance, Power, Area) metrics.
• Perform timing analysis and optimization for setup, hold, signal integrity, and noise issues.
• Work closely with RTL, DFT, STA, and Signoff teams to achieve project milestones.
• Develop and improve implementation methodologies, automation, and design flows.
• Debug and resolve implementation challenges across advanced process nodes.
• Guide and mentor junior engineers while providing technical leadership to project teams.
• Interface directly with customers and stakeholders on technical deliverables and project execution.

Required Qualifications

• Bachelor's or Master's degree in Electronics, VLSI, Electrical Engineering, or related field.
• 8+ years of hands-on experience in Physical Design implementation.
• Strong expertise in Cadence Innovus tool flow.
• Extensive experience working on advanced TSMC technology nodes (7nm, 5nm, 4nm, 3nm, or below).
• Strong understanding of floorplanning, CTS, routing, timing closure, IR/EM analysis, and signoff methodologies.
• Hands-on experience with STA tools such as PrimeTime.
• Good knowledge of physical verification and signoff flows.
• Strong scripting skills in Tcl, Perl, Python, or Shell.
• Proven experience leading teams and delivering successful tape-outs.

Preferred Skills

• Experience with low-power implementation techniques.
• Knowledge of hierarchical and flat implementation flows.
• Exposure to advanced packaging technologies is a plus.
• Excellent communication, leadership, and problem-solving skills.

Why Join leadIC Design

• Opportunity to work on cutting-edge semiconductor designs.
• Exposure to advanced TSMC technology nodes.
• Collaborative and technically strong engineering environment.
• Career growth through leadership and ownership opportunities.

Referrals & Applications

Interested candidates can apply directly or send their profiles to:

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For referrals and further information, please send a direct message or email your resume.