Senior Firmware Engineer

I. JOB SUMMARY

PCIe switch firmware engineer is responsible for the development and board-level debugging of PCIe switch firmware, and have the ability to debug operating system-level PCIe issues.

II. PRINCIPAL DUTIES AND RESPONSIBILITIES (ESSENTIAL FUNCTIONS)

Responsible for PCIe switch firmware development.

Collaborate with various functional teams to build and debug PCIe switches.

Work with EE engineers to design PCIe topology and clock mode.

Work with BIOS engineers to debug system-level PCIe issues

Capable of debugging all PCIe issues, including upstream host operating system kernels and downstream PCIe devices such as GPU and NVMe SSD.

KNOWLEDGE, SKILLS AND ABILITIES

Proficient in PCIe protocols (Gen1/3/4/5) and clock modes (CC+SSC, SRIS, SRNS).

Familiar with PCIe address space: setpoint addresses, MMIO addresses, and I/O addresses.

Able to debug Linux kernel issues related to PCIe, including analyzing AER logs, link failures, and hot-plugging problems.

Experience in ARM-based MCU firmware development and register-level programming.

Experience developing PCIe switch firmware using PCIe switch chips from Broadcom, Microchip, or Astera Labs.

Experience with JBOG and JBOF is preferred.

. Skill: Python, Linux bash script, C/C++, XML, JSON, JavaScript