Work item :
1. Development and maintenance of in-house VIP
2. Support product line IC verification plan
Working location: Tainan Science Park
Requirements:
1. University, master's degree or above graduates from electrical machinery, electrical machinery and control, information science, automatic control, communication engineering, telecommunications, information engineering, electronics, and power machinery related departments.
2. Familiar with SystemVerilog verification language and perl related scripts. 3. Familiar with UVM or VMM methodology.
4. Familiar with protocols such as PCIE/USB/SATA.
5. More than 4 years experience in IC verification.
6. Experience in VIP development is preferred.
