Hardware Test Engineer

Summary role description:

Hiring for a Lead V93K Test Hardware Engineer for a leading semiconductor engineering company delivering end-to-end VLSI, embedded, hardware, and testing solutions.

Company description:

Our client is a leading semiconductor engineering and technology solutions company offering end-to-end solutions across VLSI design, embedded systems, hardware development, semiconductor testing, product engineering, and system-level validation. The organization provides turnkey ASIC and product development solutions across industries including automotive, data center, industrial/IoT, avionics, and semiconductors. With global operations and advanced engineering capabilities, the company provides professionals the opportunity to work on cutting-edge technologies, complex engineering programs, and next-generation semiconductor products.

Role details:

• Title / Designation: Lead V93K Test Hardware Engineer

• Location: Taipei, Taiwan

Role & responsibilities:

• Lead V93K test hardware bring-up, qualification, and debug for load boards, probe

cards, sockets, and test interfaces across wafer sort and final test.

• Drive hardware failure analysis and root-cause investigations, including signal integrity,

contact, power, thermal, and ATE-to-bench correlation issues using lab

instrumentation.

• Own ATE-to-ATE, ATE-to-bench, and load-board-to-load-board correlation, ensuring

test limits, guard bands, stability, and repeatability meet production release criteria.

• Support HVM production and yield improvement by analysing hardware-related yield

excursions, binning trends, contact failures, RMA issues, and lot-on-hold conditions.

• Review and optimize load-board hardware design, schematic, layout, signal integrity,

power distribution, thermal performance, and multi-site configurations for scalability

and throughput.

• Lead cross-functional collaboration with Test Engineering, Product Engineering, Failure

Analysis, OSAT, and Manufacturing teams, while mentoring engineers and driving

hardware debug best practices.

Candidate requirements:

• 7 - 10 years of experience in semiconductor test / test hardware engineering, with strong hands-on experience in Advantest V93K / SmarTest 7/8.

• Strong expertise in wafer sort and final test, including silicon bring-up, characterization, ATE correlation, signal integrity, power delivery, and analog/digital measurements.

• Hands-on experience with ATE instrumentation such as DPS, AVI, PPMU, and HSIO, along with bench debugging using oscilloscopes, DMMs, and thermal tools.

• Experience in high-volume manufacturing, production yield improvement, hardware correlation, failure analysis, and data analysis using tools such as JMP, Exensio, or Excel; exposure to OSATs is preferred.

• Bachelor's / master's degree in electrical or Electronics Engineering.

Selection Process:

• Two technical discussions

• HR Discussions