Work items:
1. Responsible System IO related IP development (ARM CPU, system bridge, USB2/3, PCIE, SATA, NAND, card reader, DRAM controller, transport stream).
2. SoC design flow establishment.
3. SoC chip integration (floorplan design, package bonding, whole chip synthesis and STA).
4.FPGA integration.
Requirements:
1. Master degree or above graduates from electrical machinery, electrical machinery and control, automatic control, electronics, power machinery related departments.
2. More than 3 years of relevant experience in Digital IC design is preferred.
3. Familiar with RTL coding, synthesis, LEC, STA check and ASIC design flow.
