CPU ESL Performance Modeling and Analysis Engineer-Data (Shenzhen)

1. Responsible for the development of performance models with accurate timing for key IPs such as high-performance CPU cores and buses/DDRs 2. Work with relevant teams to complete performance calibration and analysis of performance models and RTL 3. Complete exploration and simulation analysis of CPU cores/buses/DDR/SoC architecture based on accurate timing performance models.

1. Master's degree in computer or microelectronics and other related majors, 3 years or more of CPU ESL related work experience 2. Have knowledge of computer architecture, familiar with high-performance CPU micro-architecture and performance features, and have good software programming skills (C++, Python3) 3. Have good timing understanding and abstract thinking skills, as well as good communication skills, and a strong spirit of learning and exploration 4. Applicants with experience in high-performance CPU projects are preferred 5. Applicants with in-depth understanding of one or more CPU core modules such as branch prediction, out-of-order execution, memory access subsystems, hardware prefetching, etc. are preferred 6. Applicants with experience in bus/DDR model development and analysis are preferred.