Perl, Signal Generator, VI-meter, Teradyne Flex, Oscilloscope, Analyzers, Statistical Skills, Digital ATE Platforms, ATE Software Development

power supplies , JIRA, Git, Perl, Python, LabVIEW, Test Automation, power management, Hardware Debug Skills, Analog Power Electronics, Digital Embedded Electronics, Oscilloscopes, JTAG Debuggers, HW Schematics, PMIC

Usb, Pcie, Verilog, Test Plans, Ethernet, floorplanning, Area optimization, RTL, systemverilog, Timing Closure, Synthesis, High-speed protocols, SERDES, Micro-architecture, ASIC Design, Silicon bring-up, Digital Design

Software Development, Usp, Automated Test Equipment, Scripting, analog circuit analysis, probe card hardware and circuit design, Eagle 364, 500 LTX Fusion, Teradyne UltraFlex, Mbayse analysis, ETS364, EDGE probe release system, HFI, Teradyne Catalyst, Agilent customer framework features, Agilent 407x, ETS500, probe build documentation, Agilent 4062, LTX Fusion HT, ATE expertise, Ultraflex, Catalyst, Testware

security consulting , Endpoint Security, Performance Testing, test automation, Cryptography, Networking, Endurance Testing, Incident Response, risk management, workload modeling, threat identification, post incident digital forensics, CI CD, cloud authentication, computer security incident response, automated testing practices, access management, business continuity, directory services

test program development , Jtag, Dac, device characterization, Debug of digital vectors, SmarTest 8, SmarTest 7, Digital PMIC, ATPG, Advantest 93k, RF Mixed Signal products, Functional Mbist, Teradyne UFLEX, Pll, ADC, Process Voltage and Temperature, bench instrumentation, Post Silicon Validation, Scan, Mixed Signal IP, RF PMIC, Pvt

Statistical Analysis, Fitting Test Management, Mass Data Collection Systems, Digital Tools

power supplies , Gui Development, scripting for test automation, measurement and characterization equipment, thermos streamer, signal generators, Oscilloscopes, Digital Multimeters, Source Measure Units, validation and characterization

C, System Verilog, Python, Design implementation, Synthesis, Behavioral coding, Synthesis and SDC Creation, low power design, Debugging verification test cases, Digital architecture, Digital RTL, Scripting of design automation, Embedded uC Designs, Timing Analysis

Regression Testing, test plan development, quality assessment of digital circuit designs, failure mechanisms, QA automation tools, CMOS device characteristics, post-layout verification, FINFET fundamentals, Circuit Design, QA methodologies for standard cell libraries, statistical variation analysis, design rules, SRAM PPA trade-offs