AI chip architecture engineer

Responsible for the exploration and design of AI training chip architecture 2. Responsible for the collaborative design of software and hardware of AI training systems 3. Responsible for key tasks and typical operator analysis in the AI model training process under different business scenarios 4. Responsible for SystemC modeling of chip architecture.

Qualifications

1. Familiar with computing architecture and have an in-depth understanding of typical AI hardware accelerator architecture or GPU architecture 2. Have experience in AI model optimization and have a good understanding of typical AI model computing and memory access behavior 3. Familiar with distributed training processes, familiar with backpropagation and parameter update processes 4. Proficient in C/C++, Python and other related programming languages. The following are bonus points: 1. Have an understanding of the computer network TCP/IP protocol stack or RDMA protocol 2. Understand deep learning frameworks such as TensorFlow, Pytorch, etc. 3. Have experience in ISS, Cycle-Accurate Model and SystemC engineering.