Usb, C, C++, Debugging, Test Plan, Object Oriented Programming, Writing Test Cases, Oop, DDR, Ethernet, Pcie, Perl, Tcl, Function coverage, Coverage driven verification, Uvm, IP Subsystem SOC ASIC Verification, Axi, Code coverage analysis, CXL, Test bench development, Simulation, System-Verilog

C DPI Development, Hardware-Software Integration, Debugging Expertise, Scripting and Automation, Verification Planning, Uvm, systemverilog, SoC Verification, Coverage-Driven Verification

Vcs, System Verilog, Verdi, DVE, Xcelium, Questa, Uvm, SVA assertions

Usb, Nvme, DDR, Shell, Perl, Pcie, Verilog, Ethernet, Python, System Verilog, Tcl, UPF Low Power Verification, CHI, Linux development environments, Uvm, formal verification, ASIC design flows, Axi, CXL, NLP Testbench Verification, System Verilog Assertions

rtl verification , SystemVerilog PLI coding, Verilog simulations, AI-assisted tools, Timing Analysis, UVM Test Bench