tolerance analysis , Capability Studies, Fea, resins, Mechanical Aptitude, Injection Molding, engineering work plans, Plating, Metals, Product Design, electrical connector design, stamping, Dfmea, assembly, Doe, statistical methods

static timing analysis, Verilog, Python, Tcl, SDC development, Tempus, Cadence Innovus, simulation methodologies, Rtl Design, transistor-level concepts, Genus, digital circuit operation, custom layout fundamentals, place-and-route, multi-clock designs, Synthesis, digital design fundamentals, floorplanning, Physical Verification, systemverilog, CDC concepts, Timing Constraints, Liberty timing models, characterization concepts

tolerance analysis , Capability Studies, resins, Mechanical Aptitude, Fea, Injection Molding, engineering work plans, Plating, Metals, Product Design, electrical connector design, stamping, Dfmea, assembly, Doe, statistical methods

VA VE implementation, Tolerance stack up analysis, Proof of Concepts prototyping and testing, CAD software, Dfmea, Plastic Design, Fluid mechanical concepts, Dfm, Design Calculations, SolidWorks PDM, New Product Development, DFA

rtl development , Vcs, Gdb, Shell, Perl, Verilog, Python, ASIC design flow, floor-planning, scripting knowledge, Simulation Tools, Timing Analysis, Logic Synthesis, debug tools, Eco, design and verification tools, micro-architecture, Debussy, bring-up lab debug

power integrity , Routing, CTS, primetime, Fusion Compiler, floorplanning, ICC2, PDN Placement, Physical Verification, Calibre, Innovus, SoC ASIC Physical Design, Timing Closure, signoff methodologies