Python Scripting, silicon debug, Circuit Simulation, nWave waveform viewer, Memory Compilers, XA FinSim, Silicon Failures Analysis, CMOS Circuit Design, XARA, HSIM, Hspice, Power gating Architecture

Perl, Python, Tcl, Statistical Analysis, SPICE simulations, PVT corners, transistor-level simulation, yield optimization, Cadence Virtuoso, SRAM Memory circuit design

Scripting, Memory Design, Synopsys, Flow automation, Analog Design, NVM design, IO standard cells, Foundation IP design, NVM technology macro architecture, Cadence

top level verification, EDA tools for Cadence, block level routing, Floor Planning, layout dependent effects, EM IR quality checks, macro level assembly, CMOS integrated circuits