Perl, Shell scripting, Python, Tcl, Chip Design, Layout, Circuit Simulation, EDA Tools, VLSI Physical Design, Timing Analysis, Place Route

Perl, Shell scripting, Python, Tcl, Layout, EDA Tools, IC design, Circuit Simulation, Timing Analysis, digital circuit design, Place Route

Python, Tcl, PT Formality, Cadence RC compiler, EDA software from Synopsys DC, LEC