As a Silicon Photonic Package Process Engineer within our Packaging Technology & Quality team you will play a vital role in ensuring that our hardware solutions meet the highest standards of excellence. We are looking for a dedicated engineer to join our collaborative team, where your technical expertise will directly influence the reliability, durability, and performance of the cutting-edge optics products.

What You'll Do

Facilitate the seamless transition of silicon photonic products from New Product Introduction (NPI) to High-Volume Manufacturing (HVM).
Draft, maintain, and optimize technical engineering specifications and process documentation to ensure manufacturing consistency and quality.
Provide hands-on support for IC packaging, ensuring strict adherence to process flows across OSAT (Outsourced Semiconductor Assembly and Test) and CM (Contract Manufacturer) partners.
Identify, document, and analyze packaging process failures, leveraging failure analysis expertise to drive effective root cause resolution.
Partner with cross-functional teams to monitor process performance, utilizing Statistical Process Control (SPC) to implement continuous improvements.

Who You'll Work With You will join a dynamic hardware engineering team, working in close partnership with internal design teams, external OSAT partners, and contract manufacturers. You will collaborate extensively with Quality, Supply Chain, and Manufacturing organizations to ensure our products consistently meet the highest standards for reliability and performance.

Minimum Requirements

Bachelor's degree in Materials Science, Mechanical Engineering, Electrical Engineering, or a related technical field.
Minimum of 2 years of professional experience in IC packaging or semiconductor manufacturing.
Proficiency in data analysis tools, specifically Microsoft Excel and JMP.
Working knowledge of structured problem-solving methodologies, including 8D, and Statistical Process Control (SPC).

Preferred Requirements

Proficiency in failure analysis techniques related to IC packaging, including root cause identification and mitigation.
Working knowledge of semiconductor package and PCB layout principles (stackups, routing constraints, signal/power integrity considerations).
Familiarity with package design rules and industry-standards such as JEDEC.
Proven track record of driving continuous process improvements and maintaining high-quality technical documentation.

Why Cisco

At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Silicon Photonic Packaging Engineer