code coverage , Python, C, Debugging, Shell, Tcl, Verilog, System Verilog, Perl, Uvm, constrained random methodologies, Metric Driven Verification, assertions, functional coverage, formal verification methodologies

Verilog, Sata, Python, Perl, Usb, Uvm, constrained random verification, functional coverage, PCI Express, systemverilog, VMM, DV methodologies

arm architecture , C, Firmware, Soc Architecture, Verilog, Embedded Software, Python, Perl, Assembly, CPU architecture, Emulation, systemverilog, AMBA protocols, Simulation