Image Processing, Object Oriented Programming, multimedia IPs, verification techniques, assertion-based verification, Uvm, gate-level simulation, systemverilog, memory system architecture, performance verification of ASICs, ASIC standard interfaces, SOC DV, low-power DV, System Verilog Assertions

Usb, Sata, Specman e, CXL, PCI Express, UCIe, Uvm, systemverilog

Shell, Verilog, Python, Rtl Design, Linux environments, UVM methodology, systemverilog

C, Gdb, Scala, Gcc, Embedded Software, Scripting Languages, Python, RTL simulation, command line tools, wave tracing, Chisel, systemverilog

Perl, Vcs, Verilog, Python, Xcelium, QuestaSim, Uvm, systemverilog

Sata, Usb, PCI Express, Specman e, UCIe, Uvm, CXL, systemverilog

C, Perl, Python, checkers, verification methodologies, assertion-based verification, Uvm, bus functional models, systemverilog, scoreboards, random stimulus, VMM, monitors, functional coverage