Pre-Silicon DFT Verification Engineer

Company Overview

MetAntz is seeking a highly skilled engineer to lead pre-silicon DFT verification. You will validate custom AI, ML compute accelerators, high-bandwidth memory (HBM) systems, and high-speed network interfaces. You will port massive AI SoC designs into hardware emulation environments to guarantee first-pass silicon success.

Core ResponsibilitiesEmulation Model Deployment

Essential Qualifications

Collaborate closely with core DFT, RTL and Software teams to build DFT capabilities in hardware emulation environments to speed up validation of DFT functionality.
Build, compile, and optimize of large-scale AI SoC emulation models with integrated DFT logic. You will map DFT structures (like scan chains, JTAG and Memory BIST) onto emulation hardware to verify the logic at faster speeds than in simulation environments.
You will ensure that complex test patterns used for manufacturing tests can be successfully executed in pre-silicon emulation environments.
When a test fails in emulation, use deep-trace and debugging tools to identify the exact cycle and logic causing the problem before sending the design to a foundry.Pre-Silicon DFT Validation

Validate Memory BIST (MBIST), Logic BIST (LBIST), JTAG IEEE standards (1149.1, 1500, 1687), and scan compression logic on hardware accelerators.Pre, Post-Silicon Debug

Diagnose complex logic faults and compile deep trace debug data from Palladium, Zebu or Protium emulation machines.

Education: Bachelor's or Master's degree in Electronics & Communication, Computer Engineering, or equivalent.
Experience: 6+ years of hands-on experience in silicon development flows and DFT, Emulation methodologies.
Platform Experience: Deep technical experience configuring and compiling systems on hardware emulators like Cadence Palladium, Synopsys ZeBu or Siemens Veloce.
DFT Expertise: Practical knowledge of IEEE testing standards (1149.x, 1500, 1687) and scan network architecture.
Languages: High proficiency in SystemVerilog, Verilog, and hardware description languages.
Automation Infrastructure: Advanced automation skills using Python, Tcl, or Perl to control EDA flows.

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